Module core::arch::wasm32

This is supported on WebAssembly only.

Platform-specific intrinsics for the wasm32 platform.

This module provides intrinsics specific to the WebAssembly architecture. Here you’ll find intrinsics specific to WebAssembly that aren’t otherwise surfaced somewhere in a cross-platform abstraction of std, and you’ll also find functions for leveraging WebAssembly proposals such as atomics and simd.

Intrinsics in the wasm32 module are modeled after the WebAssembly instructions that they represent. Most functions are named after the instruction they intend to correspond to, and the arguments/results correspond to the type signature of the instruction itself. Stable WebAssembly instructions are documented online.

If a proposal is not yet stable in WebAssembly itself then the functions within this function may be unstable and require the nightly channel of Rust to use. As the proposal itself stabilizes the intrinsics in this module should stabilize as well.

See the module documentation for general information about the arch module and platform intrinsics.

Atomics

The threads proposal for WebAssembly adds a number of instructions for dealing with multithreaded programs. Most instructions added in the atomics proposal are exposed in Rust through the std::sync::atomic module. Some instructions, however, don’t have direct equivalents in Rust so they’re exposed here instead.

Note that the instructions added in the atomics proposal can work in either a context with a shared wasm memory and without. These intrinsics are always available in the standard library, but you likely won’t be able to use them too productively unless you recompile the standard library (and all your code) with -Ctarget-feature=+atomics.

It’s also worth pointing out that multi-threaded WebAssembly and its story in Rust is still in a somewhat “early days” phase as of the time of this writing. Pieces should mostly work but it generally requires a good deal of manual setup. At this time it’s not as simple as “just call std::thread::spawn”, but it will hopefully get there one day!

SIMD

The simd proposal for WebAssembly added a new v128 type for a 128-bit SIMD register. It also added a large array of instructions to operate on the v128 type to perform data processing. Using SIMD on wasm is intended to be similar to as you would on x86_64, for example. You’d write a function such as:

#[cfg(target_arch = "wasm32")]
#[target_feature(enable = "simd128")]
unsafe fn uses_simd() {
    use std::arch::wasm32::*;
    // ...
}

Unlike x86_64, however, WebAssembly does not currently have dynamic detection at runtime as to whether SIMD is supported (this is one of the motivators for the conditional sections and feature detection proposals, but that is still pretty early days). This means that your binary will either have SIMD and can only run on engines which support SIMD, or it will not have SIMD at all. For compatibility the standard library itself does not use any SIMD internally. Determining how best to ship your WebAssembly binary with SIMD is largely left up to you as it can can be pretty nuanced depending on your situation.

To enable SIMD support at compile time you need to do one of two things:

• First you can annotate functions with #[target_feature(enable = "simd128")]. This causes just that one function to have SIMD support available to it, and intrinsics will get inlined as usual in this situation.

• Second you can compile your program with -Ctarget-feature=+simd128. This compilation flag blanket enables SIMD support for your entire compilation. Note that this does not include the standard library unless you recompile the standard library.

If you enable SIMD via either of these routes then you’ll have a WebAssembly binary that uses SIMD instructions, and you’ll need to ship that accordingly. Also note that if you call SIMD intrinsics but don’t enable SIMD via either of these mechanisms, you’ll still have SIMD generated in your program. This means to generate a binary without SIMD you’ll need to avoid both options above plus calling into any intrinsics in this module.

Structs

v128	WASM-specific 128-bit wide SIMD vector type.

Functions

memory_atomic_notify⚠	Experimentalatomics Corresponding intrinsic to wasm’s memory.atomic.notify instruction
memory_atomic_wait32⚠	Experimentalatomics Corresponding intrinsic to wasm’s memory.atomic.wait32 instruction
memory_atomic_wait64⚠	Experimentalatomics Corresponding intrinsic to wasm’s memory.atomic.wait64 instruction
f32x4	simd128 Materializes a SIMD value from the provided operands.
f32x4_abs	simd128 Calculates the absolute value of each lane of a 128-bit vector interpreted as four 32-bit floating point numbers.
f32x4_add	simd128 Adds pairwise lanes of two 128-bit vectors interpreted as four 32-bit floating point numbers.
f32x4_ceil	simd128 Lane-wise rounding to the nearest integral value not smaller than the input.
f32x4_convert_i32x4	simd128 Converts a 128-bit vector interpreted as four 32-bit signed integers into a 128-bit vector of four 32-bit floating point numbers.
f32x4_convert_u32x4	simd128 Converts a 128-bit vector interpreted as four 32-bit unsigned integers into a 128-bit vector of four 32-bit floating point numbers.
f32x4_demote_f64x2_zero	simd128 Conversion of the two double-precision floating point lanes to two lower single-precision lanes of the result. The two higher lanes of the result are initialized to zero. If the conversion result is not representable as a single-precision floating point number, it is rounded to the nearest-even representable number.
f32x4_div	simd128 Divides pairwise lanes of two 128-bit vectors interpreted as four 32-bit floating point numbers.
f32x4_eq	simd128 Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit floating point numbers.
f32x4_extract_lane	simd128 Extracts a lane from a 128-bit vector interpreted as 4 packed f32 numbers.
f32x4_floor	simd128 Lane-wise rounding to the nearest integral value not greater than the input.
f32x4_ge	simd128 Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit floating point numbers.
f32x4_gt	simd128 Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit floating point numbers.
f32x4_le	simd128 Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit floating point numbers.
f32x4_lt	simd128 Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit floating point numbers.
f32x4_max	simd128 Calculates the maximum of pairwise lanes of two 128-bit vectors interpreted as four 32-bit floating point numbers.
f32x4_min	simd128 Calculates the minimum of pairwise lanes of two 128-bit vectors interpreted as four 32-bit floating point numbers.
f32x4_mul	simd128 Multiplies pairwise lanes of two 128-bit vectors interpreted as four 32-bit floating point numbers.
f32x4_ne	simd128 Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit floating point numbers.
f32x4_nearest	simd128 Lane-wise rounding to the nearest integral value; if two values are equally near, rounds to the even one.
f32x4_neg	simd128 Negates each lane of a 128-bit vector interpreted as four 32-bit floating point numbers.
f32x4_pmax	simd128 Lane-wise maximum value, defined as a < b ? b : a
f32x4_pmin	simd128 Lane-wise minimum value, defined as b < a ? b : a
f32x4_replace_lane	simd128 Replaces a lane from a 128-bit vector interpreted as 4 packed f32 numbers.
f32x4_splat	simd128 Creates a vector with identical lanes.
f32x4_sqrt	simd128 Calculates the square root of each lane of a 128-bit vector interpreted as four 32-bit floating point numbers.
f32x4_sub	simd128 Subtracts pairwise lanes of two 128-bit vectors interpreted as four 32-bit floating point numbers.
f32x4_trunc	simd128 Lane-wise rounding to the nearest integral value with the magnitude not larger than the input.
f64x2	simd128 Materializes a SIMD value from the provided operands.
f64x2_abs	simd128 Calculates the absolute value of each lane of a 128-bit vector interpreted as two 64-bit floating point numbers.
f64x2_add	simd128 Adds pairwise lanes of two 128-bit vectors interpreted as two 64-bit floating point numbers.
f64x2_ceil	simd128 Lane-wise rounding to the nearest integral value not smaller than the input.
f64x2_convert_low_i32x4	simd128 Lane-wise conversion from integer to floating point.
f64x2_convert_low_u32x4	simd128 Lane-wise conversion from integer to floating point.
f64x2_div	simd128 Divides pairwise lanes of two 128-bit vectors interpreted as two 64-bit floating point numbers.
f64x2_eq	simd128 Compares two 128-bit vectors as if they were two vectors of 2 sixty-four-bit floating point numbers.
f64x2_extract_lane	simd128 Extracts a lane from a 128-bit vector interpreted as 2 packed f64 numbers.
f64x2_floor	simd128 Lane-wise rounding to the nearest integral value not greater than the input.
f64x2_ge	simd128 Compares two 128-bit vectors as if they were two vectors of 2 sixty-four-bit floating point numbers.
f64x2_gt	simd128 Compares two 128-bit vectors as if they were two vectors of 2 sixty-four-bit floating point numbers.
f64x2_le	simd128 Compares two 128-bit vectors as if they were two vectors of 2 sixty-four-bit floating point numbers.
f64x2_lt	simd128 Compares two 128-bit vectors as if they were two vectors of 2 sixty-four-bit floating point numbers.
f64x2_max	simd128 Calculates the maximum of pairwise lanes of two 128-bit vectors interpreted as two 64-bit floating point numbers.
f64x2_min	simd128 Calculates the minimum of pairwise lanes of two 128-bit vectors interpreted as two 64-bit floating point numbers.
f64x2_mul	simd128 Multiplies pairwise lanes of two 128-bit vectors interpreted as two 64-bit floating point numbers.
f64x2_ne	simd128 Compares two 128-bit vectors as if they were two vectors of 2 sixty-four-bit floating point numbers.
f64x2_nearest	simd128 Lane-wise rounding to the nearest integral value; if two values are equally near, rounds to the even one.
f64x2_neg	simd128 Negates each lane of a 128-bit vector interpreted as two 64-bit floating point numbers.
f64x2_pmax	simd128 Lane-wise maximum value, defined as a < b ? b : a
f64x2_pmin	simd128 Lane-wise minimum value, defined as b < a ? b : a
f64x2_promote_low_f32x4	simd128 Conversion of the two lower single-precision floating point lanes to the two double-precision lanes of the result.
f64x2_replace_lane	simd128 Replaces a lane from a 128-bit vector interpreted as 2 packed f64 numbers.
f64x2_splat	simd128 Creates a vector with identical lanes.
f64x2_sqrt	simd128 Calculates the square root of each lane of a 128-bit vector interpreted as two 64-bit floating point numbers.
f64x2_sub	simd128 Subtracts pairwise lanes of two 128-bit vectors interpreted as two 64-bit floating point numbers.
f64x2_trunc	simd128 Lane-wise rounding to the nearest integral value with the magnitude not larger than the input.
i8x16	simd128 Materializes a SIMD value from the provided operands.
i8x16_abs	simd128 Lane-wise wrapping absolute value.
i8x16_add	simd128 Adds two 128-bit vectors as if they were two packed sixteen 8-bit integers.
i8x16_add_sat	simd128 Adds two 128-bit vectors as if they were two packed sixteen 8-bit signed integers, saturating on overflow to i8::MAX.
i8x16_all_true	simd128 Returns true if all lanes are nonzero or false if any lane is nonzero.
i8x16_bitmask	simd128 Extracts the high bit for each lane in a and produce a scalar mask with all bits concatenated.
i8x16_eq	simd128 Compares two 128-bit vectors as if they were two vectors of 16 eight-bit integers.
i8x16_extract_lane	simd128 Extracts a lane from a 128-bit vector interpreted as 16 packed i8 numbers.
i8x16_ge	simd128 Compares two 128-bit vectors as if they were two vectors of 16 eight-bit signed integers.
i8x16_gt	simd128 Compares two 128-bit vectors as if they were two vectors of 16 eight-bit signed integers.
i8x16_le	simd128 Compares two 128-bit vectors as if they were two vectors of 16 eight-bit signed integers.
i8x16_lt	simd128 Compares two 128-bit vectors as if they were two vectors of 16 eight-bit signed integers.
i8x16_max	simd128 Compares lane-wise signed integers, and returns the maximum of each pair.
i8x16_min	simd128 Compares lane-wise signed integers, and returns the minimum of each pair.
i8x16_narrow_i16x8	simd128 Converts two input vectors into a smaller lane vector by narrowing each lane.
i8x16_ne	simd128 Compares two 128-bit vectors as if they were two vectors of 16 eight-bit integers.
i8x16_neg	simd128 Negates a 128-bit vectors intepreted as sixteen 8-bit signed integers
i8x16_popcnt	simd128 Count the number of bits set to one within each lane.
i8x16_replace_lane	simd128 Replaces a lane from a 128-bit vector interpreted as 16 packed i8 numbers.
i8x16_shl	simd128 Shifts each lane to the left by the specified number of bits.
i8x16_shr	simd128 Shifts each lane to the right by the specified number of bits, sign extending.
i8x16_shuffle	simd128 Returns a new vector with lanes selected from the lanes of the two input vectors $a and $b specified in the 16 immediate operands.
i8x16_splat	simd128 Creates a vector with identical lanes.
i8x16_sub	simd128 Subtracts two 128-bit vectors as if they were two packed sixteen 8-bit integers.
i8x16_sub_sat	simd128 Subtracts two 128-bit vectors as if they were two packed sixteen 8-bit signed integers, saturating on overflow to i8::MIN.
i8x16_swizzle	simd128 Returns a new vector with lanes selected from the lanes of the first input vector a specified in the second input vector s.
i16x8	simd128 Materializes a SIMD value from the provided operands.
i16x8_abs	simd128 Lane-wise wrapping absolute value.
i16x8_add	simd128 Adds two 128-bit vectors as if they were two packed eight 16-bit integers.
i16x8_add_sat	simd128 Adds two 128-bit vectors as if they were two packed eight 16-bit signed integers, saturating on overflow to i16::MAX.
i16x8_all_true	simd128 Returns 1 if all lanes are nonzero or 0 if any lane is nonzero.
i16x8_bitmask	simd128 Extracts the high bit for each lane in a and produce a scalar mask with all bits concatenated.
i16x8_eq	simd128 Compares two 128-bit vectors as if they were two vectors of 8 sixteen-bit integers.
i16x8_extadd_pairwise_i8x16	simd128 Lane-wise integer extended pairwise addition producing extended results (twice wider results than the inputs).
i16x8_extadd_pairwise_u8x16	simd128 Lane-wise integer extended pairwise addition producing extended results (twice wider results than the inputs).
i16x8_extend_high_i8x16	simd128 Converts high half of the smaller lane vector to a larger lane vector, sign extended.
i16x8_extend_high_u8x16	simd128 Converts high half of the smaller lane vector to a larger lane vector, zero extended.
i16x8_extend_low_i8x16	simd128 Converts low half of the smaller lane vector to a larger lane vector, sign extended.
i16x8_extend_low_u8x16	simd128 Converts low half of the smaller lane vector to a larger lane vector, zero extended.
i16x8_extmul_high_i8x16	simd128 Lane-wise integer extended multiplication producing twice wider result than the inputs.
i16x8_extmul_high_u8x16	simd128 Lane-wise integer extended multiplication producing twice wider result than the inputs.
i16x8_extmul_low_i8x16	simd128 Lane-wise integer extended multiplication producing twice wider result than the inputs.
i16x8_extmul_low_u8x16	simd128 Lane-wise integer extended multiplication producing twice wider result than the inputs.
i16x8_extract_lane	simd128 Extracts a lane from a 128-bit vector interpreted as 8 packed i16 numbers.
i16x8_ge	simd128 Compares two 128-bit vectors as if they were two vectors of 8 sixteen-bit signed integers.
i16x8_gt	simd128 Compares two 128-bit vectors as if they were two vectors of 8 sixteen-bit signed integers.
i16x8_le	simd128 Compares two 128-bit vectors as if they were two vectors of 8 sixteen-bit signed integers.
i16x8_load_extend_i8x8⚠	simd128 Load eight 8-bit integers and sign extend each one to a 16-bit lane
i16x8_load_extend_u8x8⚠	simd128 Load eight 8-bit integers and zero extend each one to a 16-bit lane
i16x8_lt	simd128 Compares two 128-bit vectors as if they were two vectors of 8 sixteen-bit signed integers.
i16x8_max	simd128 Compares lane-wise signed integers, and returns the maximum of each pair.
i16x8_min	simd128 Compares lane-wise signed integers, and returns the minimum of each pair.
i16x8_mul	simd128 Multiplies two 128-bit vectors as if they were two packed eight 16-bit signed integers.
i16x8_narrow_i32x4	simd128 Converts two input vectors into a smaller lane vector by narrowing each lane.
i16x8_ne	simd128 Compares two 128-bit vectors as if they were two vectors of 8 sixteen-bit integers.
i16x8_neg	simd128 Negates a 128-bit vectors intepreted as eight 16-bit signed integers
i16x8_q15mulr_sat	simd128 Lane-wise saturating rounding multiplication in Q15 format.
i16x8_replace_lane	simd128 Replaces a lane from a 128-bit vector interpreted as 8 packed i16 numbers.
i16x8_shl	simd128 Shifts each lane to the left by the specified number of bits.
i16x8_shr	simd128 Shifts each lane to the right by the specified number of bits, sign extending.
i16x8_shuffle	simd128 Same as i8x16_shuffle, except operates as if the inputs were eight 16-bit integers, only taking 8 indices to shuffle.
i16x8_splat	simd128 Creates a vector with identical lanes.
i16x8_sub	simd128 Subtracts two 128-bit vectors as if they were two packed eight 16-bit integers.
i16x8_sub_sat	simd128 Subtracts two 128-bit vectors as if they were two packed eight 16-bit signed integers, saturating on overflow to i16::MIN.
i32x4	simd128 Materializes a SIMD value from the provided operands.
i32x4_abs	simd128 Lane-wise wrapping absolute value.
i32x4_add	simd128 Adds two 128-bit vectors as if they were two packed four 32-bit integers.
i32x4_all_true	simd128 Returns 1 if all lanes are nonzero or 0 if any lane is nonzero.
i32x4_bitmask	simd128 Extracts the high bit for each lane in a and produce a scalar mask with all bits concatenated.
i32x4_dot_i16x8	simd128 Lane-wise multiply signed 16-bit integers in the two input vectors and add adjacent pairs of the full 32-bit results.
i32x4_eq	simd128 Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit integers.
i32x4_extadd_pairwise_i16x8	simd128 Lane-wise integer extended pairwise addition producing extended results (twice wider results than the inputs).
i32x4_extadd_pairwise_u16x8	simd128 Lane-wise integer extended pairwise addition producing extended results (twice wider results than the inputs).
i32x4_extend_high_i16x8	simd128 Converts high half of the smaller lane vector to a larger lane vector, sign extended.
i32x4_extend_high_u16x8	simd128 Converts high half of the smaller lane vector to a larger lane vector, zero extended.
i32x4_extend_low_i16x8	simd128 Converts low half of the smaller lane vector to a larger lane vector, sign extended.
i32x4_extend_low_u16x8	simd128 Converts low half of the smaller lane vector to a larger lane vector, zero extended.
i32x4_extmul_high_i16x8	simd128 Lane-wise integer extended multiplication producing twice wider result than the inputs.
i32x4_extmul_high_u16x8	simd128 Lane-wise integer extended multiplication producing twice wider result than the inputs.
i32x4_extmul_low_i16x8	simd128 Lane-wise integer extended multiplication producing twice wider result than the inputs.
i32x4_extmul_low_u16x8	simd128 Lane-wise integer extended multiplication producing twice wider result than the inputs.
i32x4_extract_lane	simd128 Extracts a lane from a 128-bit vector interpreted as 4 packed i32 numbers.
i32x4_ge	simd128 Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit signed integers.
i32x4_gt	simd128 Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit signed integers.
i32x4_le	simd128 Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit signed integers.
i32x4_load_extend_i16x4⚠	simd128 Load four 16-bit integers and sign extend each one to a 32-bit lane
i32x4_load_extend_u16x4⚠	simd128 Load four 16-bit integers and zero extend each one to a 32-bit lane
i32x4_lt	simd128 Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit signed integers.
i32x4_max	simd128 Compares lane-wise signed integers, and returns the maximum of each pair.
i32x4_min	simd128 Compares lane-wise signed integers, and returns the minimum of each pair.
i32x4_mul	simd128 Multiplies two 128-bit vectors as if they were two packed four 32-bit signed integers.
i32x4_ne	simd128 Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit integers.
i32x4_neg	simd128 Negates a 128-bit vectors intepreted as four 32-bit signed integers
i32x4_replace_lane	simd128 Replaces a lane from a 128-bit vector interpreted as 4 packed i32 numbers.
i32x4_shl	simd128 Shifts each lane to the left by the specified number of bits.
i32x4_shr	simd128 Shifts each lane to the right by the specified number of bits, sign extending.
i32x4_shuffle	simd128 Same as i8x16_shuffle, except operates as if the inputs were four 32-bit integers, only taking 4 indices to shuffle.
i32x4_splat	simd128 Creates a vector with identical lanes.
i32x4_sub	simd128 Subtracts two 128-bit vectors as if they were two packed four 32-bit integers.
i32x4_trunc_sat_f32x4	simd128 Converts a 128-bit vector interpreted as four 32-bit floating point numbers into a 128-bit vector of four 32-bit signed integers.
i32x4_trunc_sat_f64x2_zero	simd128 Saturating conversion of the two double-precision floating point lanes to two lower integer lanes using the IEEE convertToIntegerTowardZero function.
i64x2	simd128 Materializes a SIMD value from the provided operands.
i64x2_abs	simd128 Lane-wise wrapping absolute value.
i64x2_add	simd128 Adds two 128-bit vectors as if they were two packed two 64-bit integers.
i64x2_all_true	simd128 Returns 1 if all lanes are nonzero or 0 if any lane is nonzero.
i64x2_bitmask	simd128 Extracts the high bit for each lane in a and produce a scalar mask with all bits concatenated.
i64x2_eq	simd128 Compares two 128-bit vectors as if they were two vectors of 2 sixty-four-bit integers.
i64x2_extend_high_i32x4	simd128 Converts high half of the smaller lane vector to a larger lane vector, sign extended.
i64x2_extend_high_u32x4	simd128 Converts high half of the smaller lane vector to a larger lane vector, zero extended.
i64x2_extend_low_i32x4	simd128 Converts low half of the smaller lane vector to a larger lane vector, sign extended.
i64x2_extend_low_u32x4	simd128 Converts low half of the smaller lane vector to a larger lane vector, zero extended.
i64x2_extmul_high_i32x4	simd128 Lane-wise integer extended multiplication producing twice wider result than the inputs.
i64x2_extmul_high_u32x4	simd128 Lane-wise integer extended multiplication producing twice wider result than the inputs.
i64x2_extmul_low_i32x4	simd128 Lane-wise integer extended multiplication producing twice wider result than the inputs.
i64x2_extmul_low_u32x4	simd128 Lane-wise integer extended multiplication producing twice wider result than the inputs.
i64x2_extract_lane	simd128 Extracts a lane from a 128-bit vector interpreted as 2 packed i64 numbers.
i64x2_ge	simd128 Compares two 128-bit vectors as if they were two vectors of 2 sixty-four-bit signed integers.
i64x2_gt	simd128 Compares two 128-bit vectors as if they were two vectors of 2 sixty-four-bit signed integers.
i64x2_le	simd128 Compares two 128-bit vectors as if they were two vectors of 2 sixty-four-bit signed integers.
i64x2_load_extend_i32x2⚠	simd128 Load two 32-bit integers and sign extend each one to a 64-bit lane
i64x2_load_extend_u32x2⚠	simd128 Load two 32-bit integers and zero extend each one to a 64-bit lane
i64x2_lt	simd128 Compares two 128-bit vectors as if they were two vectors of 2 sixty-four-bit signed integers.
i64x2_mul	simd128 Multiplies two 128-bit vectors as if they were two packed two 64-bit integers.
i64x2_ne	simd128 Compares two 128-bit vectors as if they were two vectors of 2 sixty-four-bit integers.
i64x2_neg	simd128 Negates a 128-bit vectors intepreted as two 64-bit signed integers
i64x2_replace_lane	simd128 Replaces a lane from a 128-bit vector interpreted as 2 packed i64 numbers.
i64x2_shl	simd128 Shifts each lane to the left by the specified number of bits.
i64x2_shr	simd128 Shifts each lane to the right by the specified number of bits, sign extending.
i64x2_shuffle	simd128 Same as i8x16_shuffle, except operates as if the inputs were two 64-bit integers, only taking 2 indices to shuffle.
i64x2_splat	simd128 Creates a vector with identical lanes.
i64x2_sub	simd128 Subtracts two 128-bit vectors as if they were two packed two 64-bit integers.
memory_grow	Corresponding intrinsic to wasm’s memory.grow instruction
memory_size	Corresponding intrinsic to wasm’s memory.size instruction
u8x16	simd128 Materializes a SIMD value from the provided operands.
u8x16_add	simd128 Adds two 128-bit vectors as if they were two packed sixteen 8-bit integers.
u8x16_add_sat	simd128 Adds two 128-bit vectors as if they were two packed sixteen 8-bit unsigned integers, saturating on overflow to u8::MAX.
u8x16_all_true	simd128 Returns true if all lanes are nonzero or false if any lane is nonzero.
u8x16_avgr	simd128 Lane-wise rounding average.
u8x16_bitmask	simd128 Extracts the high bit for each lane in a and produce a scalar mask with all bits concatenated.
u8x16_eq	simd128 Compares two 128-bit vectors as if they were two vectors of 16 eight-bit integers.
u8x16_extract_lane	simd128 Extracts a lane from a 128-bit vector interpreted as 16 packed u8 numbers.
u8x16_ge	simd128 Compares two 128-bit vectors as if they were two vectors of 16 eight-bit unsigned integers.
u8x16_gt	simd128 Compares two 128-bit vectors as if they were two vectors of 16 eight-bit unsigned integers.
u8x16_le	simd128 Compares two 128-bit vectors as if they were two vectors of 16 eight-bit unsigned integers.
u8x16_lt	simd128 Compares two 128-bit vectors as if they were two vectors of 16 eight-bit unsigned integers.
u8x16_max	simd128 Compares lane-wise unsigned integers, and returns the maximum of each pair.
u8x16_min	simd128 Compares lane-wise unsigned integers, and returns the minimum of each pair.
u8x16_narrow_i16x8	simd128 Converts two input vectors into a smaller lane vector by narrowing each lane.
u8x16_ne	simd128 Compares two 128-bit vectors as if they were two vectors of 16 eight-bit integers.
u8x16_popcnt	simd128 Count the number of bits set to one within each lane.
u8x16_replace_lane	simd128 Replaces a lane from a 128-bit vector interpreted as 16 packed u8 numbers.
u8x16_shl	simd128 Shifts each lane to the left by the specified number of bits.
u8x16_shr	simd128 Shifts each lane to the right by the specified number of bits, shifting in zeros.
u8x16_shuffle	simd128 Returns a new vector with lanes selected from the lanes of the two input vectors $a and $b specified in the 16 immediate operands.
u8x16_splat	simd128 Creates a vector with identical lanes.
u8x16_sub	simd128 Subtracts two 128-bit vectors as if they were two packed sixteen 8-bit integers.
u8x16_sub_sat	simd128 Subtracts two 128-bit vectors as if they were two packed sixteen 8-bit unsigned integers, saturating on overflow to 0.
u8x16_swizzle	simd128 Returns a new vector with lanes selected from the lanes of the first input vector a specified in the second input vector s.
u16x8	simd128 Materializes a SIMD value from the provided operands.
u16x8_add	simd128 Adds two 128-bit vectors as if they were two packed eight 16-bit integers.
u16x8_add_sat	simd128 Adds two 128-bit vectors as if they were two packed eight 16-bit unsigned integers, saturating on overflow to u16::MAX.
u16x8_all_true	simd128 Returns 1 if all lanes are nonzero or 0 if any lane is nonzero.
u16x8_avgr	simd128 Lane-wise rounding average.
u16x8_bitmask	simd128 Extracts the high bit for each lane in a and produce a scalar mask with all bits concatenated.
u16x8_eq	simd128 Compares two 128-bit vectors as if they were two vectors of 8 sixteen-bit integers.
u16x8_extadd_pairwise_u8x16	simd128 Lane-wise integer extended pairwise addition producing extended results (twice wider results than the inputs).
u16x8_extend_high_u8x16	simd128 Converts high half of the smaller lane vector to a larger lane vector, zero extended.
u16x8_extend_low_u8x16	simd128 Converts low half of the smaller lane vector to a larger lane vector, zero extended.
u16x8_extmul_high_u8x16	simd128 Lane-wise integer extended multiplication producing twice wider result than the inputs.
u16x8_extmul_low_u8x16	simd128 Lane-wise integer extended multiplication producing twice wider result than the inputs.
u16x8_extract_lane	simd128 Extracts a lane from a 128-bit vector interpreted as 8 packed u16 numbers.
u16x8_ge	simd128 Compares two 128-bit vectors as if they were two vectors of 8 sixteen-bit unsigned integers.
u16x8_gt	simd128 Compares two 128-bit vectors as if they were two vectors of 8 sixteen-bit unsigned integers.
u16x8_le	simd128 Compares two 128-bit vectors as if they were two vectors of 8 sixteen-bit unsigned integers.
u16x8_load_extend_u8x8⚠	simd128 Load eight 8-bit integers and zero extend each one to a 16-bit lane
u16x8_lt	simd128 Compares two 128-bit vectors as if they were two vectors of 8 sixteen-bit unsigned integers.
u16x8_max	simd128 Compares lane-wise unsigned integers, and returns the maximum of each pair.
u16x8_min	simd128 Compares lane-wise unsigned integers, and returns the minimum of each pair.
u16x8_mul	simd128 Multiplies two 128-bit vectors as if they were two packed eight 16-bit signed integers.
u16x8_narrow_i32x4	simd128 Converts two input vectors into a smaller lane vector by narrowing each lane.
u16x8_ne	simd128 Compares two 128-bit vectors as if they were two vectors of 8 sixteen-bit integers.
u16x8_replace_lane	simd128 Replaces a lane from a 128-bit vector interpreted as 8 packed u16 numbers.
u16x8_shl	simd128 Shifts each lane to the left by the specified number of bits.
u16x8_shr	simd128 Shifts each lane to the right by the specified number of bits, shifting in zeros.
u16x8_shuffle	simd128 Same as i8x16_shuffle, except operates as if the inputs were eight 16-bit integers, only taking 8 indices to shuffle.
u16x8_splat	simd128 Creates a vector with identical lanes.
u16x8_sub	simd128 Subtracts two 128-bit vectors as if they were two packed eight 16-bit integers.
u16x8_sub_sat	simd128 Subtracts two 128-bit vectors as if they were two packed eight 16-bit unsigned integers, saturating on overflow to 0.
u32x4	simd128 Materializes a SIMD value from the provided operands.
u32x4_add	simd128 Adds two 128-bit vectors as if they were two packed four 32-bit integers.
u32x4_all_true	simd128 Returns 1 if all lanes are nonzero or 0 if any lane is nonzero.
u32x4_bitmask	simd128 Extracts the high bit for each lane in a and produce a scalar mask with all bits concatenated.
u32x4_eq	simd128 Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit integers.
u32x4_extadd_pairwise_u16x8	simd128 Lane-wise integer extended pairwise addition producing extended results (twice wider results than the inputs).
u32x4_extend_high_u16x8	simd128 Converts high half of the smaller lane vector to a larger lane vector, zero extended.
u32x4_extend_low_u16x8	simd128 Converts low half of the smaller lane vector to a larger lane vector, zero extended.
u32x4_extmul_high_u16x8	simd128 Lane-wise integer extended multiplication producing twice wider result than the inputs.
u32x4_extmul_low_u16x8	simd128 Lane-wise integer extended multiplication producing twice wider result than the inputs.
u32x4_extract_lane	simd128 Extracts a lane from a 128-bit vector interpreted as 4 packed u32 numbers.
u32x4_ge	simd128 Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit unsigned integers.
u32x4_gt	simd128 Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit unsigned integers.
u32x4_le	simd128 Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit unsigned integers.
u32x4_load_extend_u16x4⚠	simd128 Load four 16-bit integers and zero extend each one to a 32-bit lane
u32x4_lt	simd128 Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit unsigned integers.
u32x4_max	simd128 Compares lane-wise unsigned integers, and returns the maximum of each pair.
u32x4_min	simd128 Compares lane-wise unsigned integers, and returns the minimum of each pair.
u32x4_mul	simd128 Multiplies two 128-bit vectors as if they were two packed four 32-bit signed integers.
u32x4_ne	simd128 Compares two 128-bit vectors as if they were two vectors of 4 thirty-two-bit integers.
u32x4_replace_lane	simd128 Replaces a lane from a 128-bit vector interpreted as 4 packed u32 numbers.
u32x4_shl	simd128 Shifts each lane to the left by the specified number of bits.
u32x4_shr	simd128 Shifts each lane to the right by the specified number of bits, shifting in zeros.
u32x4_shuffle	simd128 Same as i8x16_shuffle, except operates as if the inputs were four 32-bit integers, only taking 4 indices to shuffle.
u32x4_splat	simd128 Creates a vector with identical lanes.
u32x4_sub	simd128 Subtracts two 128-bit vectors as if they were two packed four 32-bit integers.
u32x4_trunc_sat_f32x4	simd128 Converts a 128-bit vector interpreted as four 32-bit floating point numbers into a 128-bit vector of four 32-bit unsigned integers.
u32x4_trunc_sat_f64x2_zero	simd128 Saturating conversion of the two double-precision floating point lanes to two lower integer lanes using the IEEE convertToIntegerTowardZero function.
u64x2	simd128 Materializes a SIMD value from the provided operands.
u64x2_add	simd128 Adds two 128-bit vectors as if they were two packed two 64-bit integers.
u64x2_all_true	simd128 Returns 1 if all lanes are nonzero or 0 if any lane is nonzero.
u64x2_bitmask	simd128 Extracts the high bit for each lane in a and produce a scalar mask with all bits concatenated.
u64x2_eq	simd128 Compares two 128-bit vectors as if they were two vectors of 2 sixty-four-bit integers.
u64x2_extend_high_u32x4	simd128 Converts high half of the smaller lane vector to a larger lane vector, zero extended.
u64x2_extend_low_u32x4	simd128 Converts low half of the smaller lane vector to a larger lane vector, zero extended.
u64x2_extmul_high_u32x4	simd128 Lane-wise integer extended multiplication producing twice wider result than the inputs.
u64x2_extmul_low_u32x4	simd128 Lane-wise integer extended multiplication producing twice wider result than the inputs.
u64x2_extract_lane	simd128 Extracts a lane from a 128-bit vector interpreted as 2 packed u64 numbers.
u64x2_load_extend_u32x2⚠	simd128 Load two 32-bit integers and zero extend each one to a 64-bit lane
u64x2_mul	simd128 Multiplies two 128-bit vectors as if they were two packed two 64-bit integers.
u64x2_ne	simd128 Compares two 128-bit vectors as if they were two vectors of 2 sixty-four-bit integers.
u64x2_replace_lane	simd128 Replaces a lane from a 128-bit vector interpreted as 2 packed u64 numbers.
u64x2_shl	simd128 Shifts each lane to the left by the specified number of bits.
u64x2_shr	simd128 Shifts each lane to the right by the specified number of bits, shifting in zeros.
u64x2_shuffle	simd128 Same as i8x16_shuffle, except operates as if the inputs were two 64-bit integers, only taking 2 indices to shuffle.
u64x2_splat	simd128 Creates a vector with identical lanes.
u64x2_sub	simd128 Subtracts two 128-bit vectors as if they were two packed two 64-bit integers.
unreachable⚠	Generates the trap instruction UNREACHABLE
v128_and	simd128 Performs a bitwise and of the two input 128-bit vectors, returning the resulting vector.
v128_andnot	simd128 Bitwise AND of bits of a and the logical inverse of bits of b.
v128_any_true	simd128 Returns true if any bit in a is set, or false otherwise.
v128_bitselect	simd128 Use the bitmask in c to select bits from v1 when 1 and v2 when 0.
v128_load⚠	simd128 Loads a v128 vector from the given heap address.
v128_load8_lane⚠	simd128 Loads an 8-bit value from m and sets lane L of v to that value.
v128_load8_splat⚠	simd128 Load a single element and splat to all lanes of a v128 vector.
v128_load16_lane⚠	simd128 Loads a 16-bit value from m and sets lane L of v to that value.
v128_load16_splat⚠	simd128 Load a single element and splat to all lanes of a v128 vector.
v128_load32_lane⚠	simd128 Loads a 32-bit value from m and sets lane L of v to that value.
v128_load32_splat⚠	simd128 Load a single element and splat to all lanes of a v128 vector.
v128_load32_zero⚠	simd128 Load a 32-bit element into the low bits of the vector and sets all other bits to zero.
v128_load64_lane⚠	simd128 Loads a 64-bit value from m and sets lane L of v to that value.
v128_load64_splat⚠	simd128 Load a single element and splat to all lanes of a v128 vector.
v128_load64_zero⚠	simd128 Load a 64-bit element into the low bits of the vector and sets all other bits to zero.
v128_not	simd128 Flips each bit of the 128-bit input vector.
v128_or	simd128 Performs a bitwise or of the two input 128-bit vectors, returning the resulting vector.
v128_store⚠	simd128 Stores a v128 vector to the given heap address.
v128_store8_lane⚠	simd128 Stores the 8-bit value from lane L of v into m
v128_store16_lane⚠	simd128 Stores the 16-bit value from lane L of v into m
v128_store32_lane⚠	simd128 Stores the 32-bit value from lane L of v into m
v128_store64_lane⚠	simd128 Stores the 64-bit value from lane L of v into m
v128_xor	simd128 Performs a bitwise xor of the two input 128-bit vectors, returning the resulting vector.